Fast reconfiguration of the data plane of a hardware forwarding element
US10645029B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2017 |
| Grant date | May 5, 2020 |
| Priority date | — |
| Expiry date | Aug 21, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/745
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Some embodiments of the invention provide a network forwarding element that includes a set of data plane circuits with several configurable packet processing stages for receiving and processing incoming packet traffic to the forwarding element. The forwarding element also includes a set of control plane circuits that include a set of direct memory access (DMA) buffers for configuring the configurable packet processing stages of the data plane. The control plane loads configuration data for reconfiguring the data plane packet processing stages into the set of DMA buffers while the data plane packet processing stages are processing the incoming packet traffic. The control plane pauses the incoming packet traffic to the data plane packet processing stages. The control plane loads the configuration data from the DMA buffers into the data plane packet processing stages. The control plane resumes the incoming packet traffic to the data plane packet processing stages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.