Method and apparatus for efficient matrix transpose
US10649772B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2018 |
| Grant date | May 12, 2020 |
| Priority date | — |
| Expiry date | Jun 26, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/454
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed embodiments relate to a method and apparatus for efficient matrix transpose. In one example, a processor to execute a matrix transpose instruction includes fetch circuitry to fetch the matrix transpose instruction specifying a destination matrix and a source matrix having (N×M) elements and (M×N) elements, respectively, a (N×M) load buffer, decode circuitry to decode the fetched matrix transpose instruction, and execution circuitry, responsive to the decoded matrix transpose instruction to, for each row X of M rows of the specified source matrix: fetch and buffer N elements of the row in a load register, and cause the N buffered elements to be written, in the same relative order as in the row, to column X of M columns of the load buffer, and the execution circuitry subsequently to write each of N rows of the load buffer to a same row of the load buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.