Semiconductor device including dielectric layer
US10651194B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2018 |
| Grant date | May 12, 2020 |
| Priority date | — |
| Expiry date | Sep 26, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a stack structure on a substrate, the stack structure including interlayer insulating layers and first gate electrodes alternately stacked on each other, a semiconductor layer in an opening penetrating through the stack structure, a first dielectric layer between the semiconductor layer and the stack structure, and a lower pattern closer to the substrate than to the first gate electrodes in the stack structure, the lower pattern including a first surface facing the first dielectric layer, and a second surface facing the stack structure, the second surface defining an acute angle with the first surface, wherein the first dielectric layer includes a first portion facing the stack structure, and a second portion facing the first surface of the lower pattern, the second portion having a thickness greater than a thickness of the first portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.