Thin film transistor array substrate and fabricating method thereof
US10651210B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2019 |
| Grant date | May 12, 2020 |
| Priority date | — |
| Expiry date | Jul 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1216
Abstract
A thin film transistor array substrate includes: a base substrate; a first transistor including a first electrode on a surface of the base substrate, a spacer, on the first electrode, a second electrode on the spacer, a first active layer contacting the first electrode, the spacer and the second electrode, and a first gate electrode opposite to the first active layer with a first insulating layer interposed therebetween; a storage capacitor including a first storage electrode integrally connected to the first electrode or the second electrode, and a second storage electrode opposite to the first storage electrode with the first insulating layer interposed therebetween, where the second storage electrode is integrally connected to the first gate electrode; and a second transistor electrically connected to the storage capacitor, where the second transistor includes a second active layer extending in a direction intersecting the base substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.