Patent · US Active

Method for static gate clamping in multi-output gate driver systems

US10651723B1 · kind B1 · utility

2Cited by

2References

20Claims

0Family size

Assignee

Infineon Technologies Austria AG · AT

Inventors

Wolfgang Frank · Viernheim, DE
Simone Fabbro · Udine, IT
Karl Norling · Villach, AT

Key dates

Filing date	Oct 22, 2018
Grant date	May 12, 2020
Priority date	—
Expiry date	Oct 22, 2038

Classification

Technology area (CPC H)Electricity
CPC primaryH03K19/17772
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A multi-output gate driver system comprises a power device having a gate node; a first driver having an input and an output coupled to the gate node; a second driver having an input and an output coupled to the gate node; a first comparator having a first input coupled to the output of the second driver, a second input coupled to a first reference voltage, and an output; a second comparator having a first input coupled to the output of the second driver, a second input coupled to a second reference voltage, and an output; and a logic circuit having an input for receiving a control signal, a first output coupled to the input of the first driver, and a second output coupled to the input of the second driver.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.