Signed-RFDAC architectures enabling wideband and efficient 5G transmitters
US10651869B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 26, 2019 |
| Grant date | May 12, 2020 |
| Priority date | — |
| Expiry date | Mar 26, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/0002
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A radio frequency digital-to-analog converter (RFDAC) circuit includes an RFDAC array circuit including an array of cells arranged into a plurality of segments. Each segment of the plurality of segments is configured to process input data signals. The RFDAC array circuit is configured to process an input data based on activating a set of segments of the plurality of segments, forming a set of active segments, and when the sign of the input data is changed, deactivate a partially active segment of the set of active segments and activate a sign change segment within the RFDAC array circuit. The sign change segment includes a segment within the plurality of segments of the RFDAC array circuit that is different from the set of active segments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.