Patent · US Active

Processor core power event tracing

US10656697B2 · kind B2 · utility

0Cited by

3References

20Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Tsvika Kurts · Haifa, IL
Beeman C. Strong · Portland, US
Richard B. O'Connor · Irmo, US
Michael W. Chynoweth · Rio Rancho, US
Rajshree Chabukswar · Sunnyvale, US
Avner Lottem · Haifa, IL
Itamar Kazachinsky · Netanya, IL
Michael Mishaeli · Jerusalem, IL
Anthony Wojciechowski · Austin, US
Vikas R. Vasisht · Austin, US

Key dates

Filing date	Mar 5, 2018
Grant date	May 19, 2020
Priority date	—
Expiry date	Mar 5, 2038

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A processor includes a trace unit to monitor activity by the processor and generate trace packets indicative of the activity by the processor. The trace packets may include four additional packets for processor event tracing including: a dormant state request packet, a code execution stop packet, a dormant state entry packet, and a dormant state exit packet.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.