Instruction-based non-deterministic finite state automata accelerator
US10656949B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2018 |
| Grant date | May 19, 2020 |
| Priority date | — |
| Expiry date | Sep 20, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3802
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example processing device includes a memory including a non-deterministic finite automata (NFA) buffer configured to store a plurality of instructions defining an ordered sequence of instructions of at least a portion of an NFA graph, the portion of the NFA graph comprising a plurality of nodes arranged along a plurality of paths. The NFA engine determines a current symbol and one or more subsequent symbols of a payload segment that satisfy a match condition specified by a subset of instructions of the plurality of instructions for a path of the plurality of paths and in response to determining the current symbol and the one or more subsequent symbols of the payload segment that satisfy the match condition, outputs an indication that the payload data has resulted in a match.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.