Accelerate deep neural network in an FPGA
US10656962B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2016 |
| Grant date | May 19, 2020 |
| Priority date | — |
| Expiry date | Sep 24, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N20/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, system and computer program product for accelerating a deep neural network (DNN) in a field-programmable gate array (FPGA) are disclosed. The method includes receiving a DNN net file and weights, converting the received DNN net file to one or more source files, generating an executable FPGA bit file using the one or more source files, and downloading the executable FPGA bit file from the DNN conversion platform to the FPGA. Converting of the received DNN net file and the weights to the one or more source files can further include analyzing the DNN net file to identify a plurality of neural layers, decomposing one or more neural layers of the plurality of neural layers to one or more operation blocks, instantiating the one or more source files, based on the one or more operation blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.