Apparatus and a method of detecting errors on registers
US10656992B2 · kind B2 · utility
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14References
32Claims
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Key dates
| Filing date | Oct 22, 2014 |
| Grant date | May 19, 2020 |
| Priority date | — |
| Expiry date | Jan 11, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An error detection circuit on a semiconductor chip detects whether soft errors have affected flip-flop implemented registers on the semiconductor chip. A signature of these flip-flop implemented registers on the semiconductor chip is periodically captured. The signature allows for the integrity of the flip-flop implemented registers to be constantly monitored. A soft error occurring on any of the flip-flop implemented registers can be immediately detected. In response to the detection, an interrupt is raised to notify software to take action.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.