Information handling system with priority based cache flushing of flash dual in-line memory module pool
US10657052B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2018 |
| Grant date | May 19, 2020 |
| Priority date | — |
| Expiry date | Jul 20, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information handling system includes flash dual in-line memory modules, a central processing unit, and a memory controller. The memory controller detects that a value is written to a first flush hint register of a table. The first flush hint register is associated with a first flash pool of the flash dual in-line memory modules. The memory controller detects that a value is written to a second flush hint register of the table. The second flush hint register is associated with a second flash pool of the flash dual in-line memory modules. The memory controller flushes first data for the first flash pool and second data for the second flash pool in the cache to flash dual in-line memory modules in order of priority based on a first priority of the first pool and a second priority of the second pool.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.