Patent · US Active

Innovative high speed serial controller testing

US10657092B2 · kind B2 · utility

1Cited by
1References
27Claims
0Family size

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Inventors

Key dates

Filing dateJun 30, 2016
Grant dateMay 19, 2020
Priority date
Expiry dateSep 20, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4234
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing high speed serial controller testing. For instance, in accordance with one embodiment, there is a functional semiconductor device, comprising: a serial Input/Output interface (serial IO interface); a device fabric to carry transactions between a plurality of components of the functional semiconductor device; virtualized device logic embedded within the serial IO interface; a transaction originator to originate a transaction and issue the transaction onto the device fabric directed toward the serial IO interface; in which the virtualized device logic is to receive the transaction at the serial IO interface via the device fabric; in which the virtualized device logic is to modify the transaction received to form a modified transaction; in which the virtualized device logic is to issue the modified transaction onto the device fabric; and in which the modified transaction is returned to the transaction originator. Other related embodiments are disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.