Method and apparatus for memory access management for data processing
US10657617B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2018 |
| Grant date | May 19, 2020 |
| Priority date | — |
| Expiry date | Nov 26, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V20/54
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system including a central processing unit (CPU), an accelerator, a communication bus and a system memory device for dynamically processing an image file are described. The accelerator includes a local memory buffer, a data transfer scheduler, and a plurality of processing engines. The data transfer scheduler is arranged to manage data transfer between the system memory device and the local memory buffer, wherein the data transfer includes data associated with the image file. The local memory buffer is configured as a circular line buffer, and the data transfer scheduler includes a ping-pong buffer for transferring output data from the one of the processing engines to the system memory device. The local memory buffer is configured to execute cross-layer usage of data associated with the image file.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.