Wafer dicing method

US10658239B2 · kind B2 · utility

Assignees

• Semiconductor Manufacturing International (Beijing) Corporation · CN
• Semiconductor Manufacturing International (Shanghai) Corporation · CN

Inventors

• Lihui Lu · Shanghai, CN
• Chunchao Fei · Shanghai, CN
• Po Yuan Chiang · Shanghai, CN
• Yaping Wang · Cambridge, US

Key dates

• Filing date: Aug 21, 2018
• Grant date: May 19, 2020
• Expiry date: Aug 21, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2221/68327
• WIPO field: Machine tools
• WIPO sector: Mechanical engineering

Abstract

This disclosure provides wafer dicing methods, and relates to the field of semiconductor technologies. Implementations of the dicing method may include: performing laser stealth dicing processing on a wafer from a back surface of the wafer; performing grinding and thinning processing on the back surface of the wafer after performing the laser stealth dicing processing; sticking a dicing tape on the back surface of the wafer after performing the grinding and thinning processing; and performing separation processing on the wafer after sticking the dicing tape. In some implementations, stealth dicing (SD) is performed before grinding, so that a laser is directly imposed on a back surface of a wafer, thereby alleviating a laser attenuation problem and lowering requirements on light transmittance of a dicing tape.