Solid state imaging device and imaging apparatus with pixel column having multiple output lines
US10658404B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2015 |
| Grant date | May 19, 2020 |
| Priority date | — |
| Expiry date | Mar 13, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/811
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present technology relates to a solid state imaging device capable of providing a solid state imaging device that does not cause deterioration of image quality due to an increase in reading speed of a pixel signal, and an imaging apparatus. In a pixel array block in which a plurality of pixels are two-dimensionally arrayed, each of the pixels including: a photoelectric conversion device; a plurality of transistors to be used for reading a signal from the photoelectric conversion device; and wiring for driving the transistors, a plurality of pixel output lines are provided for each one column of the plurality of pixels two-dimensionally arrayed, and the plurality of pixel output lines from the pixels are arranged separately in a plurality of wiring layers. The present technology can be applied to, for example, a CMOS image sensor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.