Display device having an emission layer
US10658448B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2019 |
| Grant date | May 19, 2020 |
| Priority date | — |
| Expiry date | May 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/8792
Abstract
A display device includes signal lines and pixels connected thereto. A first pixel includes a first transistor including a first gate electrode, a first channel region overlapping the first gate electrode, a first source region, and a second drain region facing the first source region, with the first channel region interposed between the first source region and the second drain region. A third transistor includes a third gate electrode, a third channel region overlapping the third gate electrode, a third drain region connected to the first gate electrode, and a third source region facing the third drain region with the third channel region interposed between the third source region and the third drain region. A shielding part overlaps a boundary between the third source region and the third channel region and does not overlap a boundary between the third drain region and the third channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.