Holding of a link in an optical interface by a lower level processor until authorization is received from an upper level processor
US10659348B2 · kind B2 · utility
0Cited by
8References
20Claims
0Family size
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Key dates
| Filing date | Mar 7, 2018 |
| Grant date | May 19, 2020 |
| Priority date | — |
| Expiry date | Mar 7, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/55
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A lower level processor holds a link, in response to detecting a link down condition of the link. In response to the holding of the link, the lower level processor transmits a command to an upper level processor indicating the link down condition of the link. The lower level processor initiates a process of link recovery for the link, in response to receiving an authorization from the upper level processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.