Array substrate comprising a blocking element stacked on a thin film transistor and first and second shielding electrodes on a side of a data line facing away from a first substrate
US10663817B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 6, 2017 |
| Grant date | May 26, 2020 |
| Priority date | — |
| Expiry date | Nov 9, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/13775
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate, a liquid crystal display panel and a liquid crystal display apparatus are provided. The array substrate comprising first substrate; thin film transistor and data line are positioned on first substrate, data line electrically connecting with source or drain of thin film transistor; blocking element stacking positioned on thin film transistor; first shielding electrode and second shielding electrode located on lateral side of data line which away first substrate, vertical projections of first shielding electrode and second shielding electrode on first substrate are respectively covering data lines, thin film transistor positioned between first shielding electrode and second shielding electrode; transverse electrode connecting between first shielding electrode and second shielding electrode, transverse electrode located on lateral side of thin film transistor which away first substrate, and at least partial of transverse electrode is stacked positioned on blocking element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.