System and method for port-to-port communications using direct memory access
US10664420B2 · kind B2 · utility
2Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2018 |
| Grant date | May 26, 2020 |
| Priority date | — |
| Expiry date | Apr 19, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system, method, and adaptor that facilitate data transmission are described. One example of the disclosed system facilitates the chip-to-chip transport of header descriptors and payloads. The system may include a source chip, a destination chip, and a set of queues describing buffer memory locations for staging header descriptors and payloads to be transferred from the source chip to the destination chip, where the set of queues are directly accessible to the source chip and to the destination chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.