Semiconductor structure having a composite barrier layer
US10665556B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2017 |
| Grant date | May 26, 2020 |
| Priority date | — |
| Expiry date | Oct 30, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/04953
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A mechanism of a semiconductor structure with composite barrier layer under redistribution layer is provided. A semiconductor structure includes a substrate comprising a top metal layer on the substrate; a passivation layer over the top metal layer having an opening therein exposing the top metal layer; a composite barrier layer over the passivation layer and the opening, the composite barrier layer includes a center layer, a bottom layer, and an upper layer, wherein the bottom layer and the upper layer sandwich the center layer; and a redistribution layer (RDL) over the composite barrier layer and electrically connecting the underlying top metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.