Body contact layouts for semiconductor structures
US10665676B2 · kind B2 · utility
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11References
16Claims
0Family size
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Key dates
| Filing date | Apr 25, 2018 |
| Grant date | May 26, 2020 |
| Priority date | — |
| Expiry date | Apr 25, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Body contact layouts for semiconductor structures are disclosed. In at least one exemplary embodiment, a semiconductor structure comprises: a plurality of gates disposed on a semiconductor layer, each gate extending parallel to a y-axis in a coordinate space; a source region disposed between two of the plurality of gates; a plurality of body contacts disposed in each source region; and wherein a portion of each source region, adjacent to the gate, has a width extending parallel to the y-axis that is greater than the width of the source region parallel to the y-axis at a distance on an x-axis from the gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.