Thin film transistor
US10665725B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 4, 2017 |
| Grant date | May 26, 2020 |
| Priority date | — |
| Expiry date | Dec 4, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6715
Abstract
A thin film transistor and a preparation method thereof are provided. The thin film transistor includes an upper gate electrode, a lower gate electrode, an upper insulating layer, a lower insulating layer, a semiconductor layer, a source electrode and a drain electrode. The lower insulating layer is arranged on the lower gate electrode, the semiconductor layer is arranged on the lower insulating layer, the semiconductor layer is respectively lapped with the source electrode and the drain electrode, the upper insulating layer covers the semiconductor layer, and the upper gate electrode is arranged on the upper insulating layer. In a plane parallel to a conducting channel, there is a first gap between an orthographic projection of the upper gate electrode and an orthographic projection of the source electrode, and there is a second gap between the orthographic projection of the upper gate electrode and an orthographic projection of the drain electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.