Patent · US Active

Utilization of erasure codes in a storage system

US10671480B2 · kind B2 · utility

16Cited by
155References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 30, 2018
Grant dateJun 2, 2020
Priority date
Expiry dateMar 30, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7207
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A plurality of storage nodes in a single chassis is provided. The plurality of storage nodes in the single chassis is configured to communicate together as a storage cluster. Each of the plurality of storage nodes includes nonvolatile solid-state memory for user data storage. The plurality of storage nodes is configured to distribute the user data and metadata associated with the user data throughout the plurality of storage nodes such that the plurality of storage nodes maintain the ability to read the user data, using erasure coding, despite a loss of two of the plurality of storage nodes. A plurality of compute nodes is included in the single chassis, each of the plurality of compute nodes is configured to communicate with the plurality of storage nodes. A method for accessing user data in a plurality of storage nodes having nonvolatile solid-state memory is also provided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.