Memory offloading a problem using accelerators
US10671550B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 3, 2019 |
| Grant date | Jun 2, 2020 |
| Priority date | — |
| Expiry date | Jan 3, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method for offloading a problem having 2n size from processing circuitry to one or more accelerators is disclosed. The processing circuitry and the one or more accelerators include respective memories. In the method, a problem having 2n size is divided into a plurality of units each having 2u size. At least a part of the units is allocated to the one or more accelerators. A determination is made as to whether there is a remaining part of the units to be allocated onto the processing circuitry. A temporary buffer is prepared on each memory of at least the one or more accelerators. The temporary buffer is used for storing a copy of a dependent unit stored on a different memory, during inter-unit calculation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.