Current mirror scheme for an integrating neuron circuit
US10671911B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2016 |
| Grant date | Jun 2, 2020 |
| Priority date | — |
| Expiry date | Feb 19, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments are directed to a driver circuit including a first amplifier having a voltage follower configured to control a first node to maintain a voltage of the first node at a constant value. By maintaining the first node voltage, the first amplifier having the voltage follower is further configured to have a first amplifier output current into the first node at a value without the effect of the voltage fluctuation. The driver circuit further includes a second amplifier configured to control a second node, wherein the second amplifier is in a current mirror configuration with respect to the first amplifier such that a second amplifier current output is a highly precise mirror of the first amplifier current output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.