Gate driver and electroluminescence display device including the same
US10672324B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2018 |
| Grant date | Jun 2, 2020 |
| Priority date | — |
| Expiry date | Aug 21, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0233
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electroluminescent display device includes sub-pixels connected to gate lines, and a gate driver configured to supply a scan signal to at least one of the gate lines, and including stages. One of the stages includes a QB-node regulation unit configured to charge a QB-node and a QP-node to turn-on voltage by using a first gate clock signal and a second gate clock signal, and a pull-down unit configured to output a turn-off voltage in response to a voltage of the QP-node. The QB-node regulation unit includes a QP-node control part configured to invert a phase of a voltage of a Q1-node and apply the voltage of the inverted phase to the QP-node, and a QB-node control part configured to bootstrap the QP-node. Accordingly, by employing the gate driver including the QB-node regulation unit that provides a stable voltage to the QB-node and the QP-node, the reliability of the gate driver can be improved, and the bezel of the electroluminescence display device can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.