Low delay network intrusion prevention
US10673816B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2017 |
| Grant date | Jun 2, 2020 |
| Priority date | — |
| Expiry date | Oct 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/20
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method, computer program product, and system where a processor(s) in a distributed computing environment intercepts a communication (of sequential elements) between a first computing node and a second computing node. The processor(s) determines if the communication is undesired by evaluating data related to or comprising each element individually. The evaluating includes the processor(s) obtaining a first element (an earliest element in the sequence that has not been evaluated), determining, if the data related to or comprising the earliest element indicate that the communication is undesired, forwarding the earliest element to the second computing node, before obtaining a second element in the sequence (an element subsequent and adjacent to the earliest element in the sequence), and based on determining that the data related to or comprising the earliest element indicate that the communication is undesired, invalidating, an available element of the sequential elements such that the second computing node does not receive the communication in a usable format.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.