Display driver circuit for adjusting framerate to reduce power consumption
US10674112B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2019 |
| Grant date | Jun 2, 2020 |
| Priority date | — |
| Expiry date | May 17, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display driver circuit includes a source driver configured to output display data to data lines, a controller configured to control the source driver, based on a synchronization signal, and a frequency adjusting circuit configured to extend a first time interval of the synchronization signal from a first length to a second length, such that time interval in which the display data is not output to the data lines is extended, when second image data are not received from an external device during a reference time interval after first image data are received from the external device, and shorten the first time interval, from the second length to a third length, when an instruction is received from the external device after the first time interval is extended to the second length.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.