FPGA-based method for network function accelerating and system thereof
US10678584B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2018 |
| Grant date | Jun 9, 2020 |
| Priority date | — |
| Expiry date | Jan 25, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/509
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to an FPGA-based method and system for network function accelerating. The method comprises: building a network function accelerating system that includes a physical machine and an accelerator card connected through a PCIe channel, wherein the physical machine includes a processor and the accelerator card includes an FPGA, in which the accelerator card serves to provide network function accelerating for the processor; the processor being configured to: when it requires the accelerator card to provide network function accelerating, check whether there is any required accelerator module present in the FPGA, and if yes, acquire an accelerating function ID corresponding to the required accelerator module, and if not, select at least one partial reconfigurable region in the FPGA and configure it into the required accelerator module and generate a corresponding accelerating function ID; and/or sending an accelerating request to the FPGA.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.