Patent · US Active

Method and system for lockless interprocessor communication

US10678744B2 · kind B2 · utility

0Cited by
15References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 3, 2010
Grant dateJun 9, 2020
Priority date
Expiry dateMar 1, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/544
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A computer readable storage medium storing a set of instructions executable by a processor. The set of instructions is operable to receive, from a first processor, a message to be sent to a second processor; store the message in a portion of a shared memory, the shared memory being shared by the first processor and the second processor; store, in an instruction list stored in a further portion of the shared memory, an instruction corresponding to the message; and prompt the second processor to read the message list.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.