Computer systems that are able to reduce memory data flow and graphics processing methods thereof
US10679318B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2019 |
| Grant date | Jun 9, 2020 |
| Priority date | — |
| Expiry date | Apr 11, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/122
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics processing method is provided, adapted to a graphic processing unit, the steps including: receiving, via a CSP, a first command associated with all render targets from a display driver; determining, via the display driver, sizes and areas of a plurality of tiles in each frame; repeatedly controlling, via a scissor pool unit, a graphics processing unit to perform drawing processing for each tile according to the first command; comparing, via a signature comparing unit of a cache memory, a signature of a current tile of a current frame and a signature of a tile corresponding to the same position of a previous frame and generating a comparison result; and determining whether to flush the dirty data of the current tile stored in the cache memory from the cache memory to a memory access unit according to the comparison result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.