Switching circuit
US10679823B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2019 |
| Grant date | Jun 9, 2020 |
| Priority date | — |
| Expiry date | Jan 23, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2017/6875
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment, an impedance matching network includes at least one electronically variable capacitor (EVC), each EVC comprising discrete capacitors having corresponding switches, the switches configured to switch in and out the discrete capacitors to alter a total capacitance of the EVC. Each switch includes a first terminal operably coupled to the corresponding discrete capacitor, a second terminal, and a switching circuit coupled between the first terminal and the second terminal, the switching circuit comprising a switching transistor. A tuning inductor is coupled parallel to the switching circuit. A value for the tuning inductor enables the tuning inductor to cancel a cumulative parasitic capacitance of the switching circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.