Heat resistant and shock resistant integrated circuit
US10679960B2 · kind B2 · utility
0Cited by
1References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2017 |
| Grant date | Jun 9, 2020 |
| Priority date | — |
| Expiry date | Apr 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A heat and shock resistant integrated circuit (IC) of the present invention includes a base material, a metal layer disposed on the base material, a silicon die disposed on the metal layer, additive material disposed on the base material, gas filled filler material disposed between the additive material and the silicon die, and first traces electrically connecting the silicon die to the additive material. Packing of the integrated circuit provides exceptional thermal stress relief and impact protection of circuitry within the packaging.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.