Semiconductor device comprising work function metal pattern in boundary region and method for fabricating the same
US10679997B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2019 |
| Grant date | Jun 9, 2020 |
| Priority date | — |
| Expiry date | Apr 23, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0177
- WIPO fieldMaterials, metallurgy
- WIPO sectorChemistry
Abstract
A semiconductor device and method for fabricating the same are provided. The semiconductor device includes a substrate including a cell region, a core region, and a boundary region between the cell region and the core region, a boundary element isolation layer in the boundary region of the substrate to separate the cell region from the core region, a high-k dielectric layer on at least a part of the boundary element isolation layer and the core region of the substrate, a first work function metal pattern comprising a first extension overlapping the boundary element isolation layer on the high-k dielectric layer, and a second work function metal pattern comprising a second extension overlapping the boundary element isolation layer on the first work function metal pattern, wherein a first length of the first extension is different from a second length of the second extension.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.