Patent · US Active

Power gated lookup table circuitry

US10686446B2 · kind B2 · utility

0Cited by
8References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 26, 2017
Grant dateJun 16, 2020
Priority date
Expiry dateJun 26, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/1776
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A programmable integrated circuit with lookup table circuitry is provided. The lookup table (LUT) circuitry may be formed using multiplexers. A multiplexer in the lookup table circuitry may be implemented using only tristate inverting circuits. Each tristate inverting circuit may include a first set of n-channel and p-channel transistors that receive a static control bit from a memory element and a second set of n-channel and p-channel transistors that receive true and complementary versions of a user signal. The first and second sets of transistors may be coupled in series between a positive power supply terminal and a ground power supply terminal. A LUT multiplexer implemented in this way need not include separate transmission gates at the output of each tristate inverting circuit and may exhibit minimal subthreshold leakage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.