Conflict mask generation
US10691454B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2019 |
| Grant date | Jun 23, 2020 |
| Priority date | — |
| Expiry date | Jan 16, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30094
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Single Instruction, Multiple Data (SIMD) technologies are described. A processor can store a first bitmap and generate a second bitmap with each cell identifying a mask bit. The mask bit is set when 1) a corresponding cell in a first bitmap is not in conflict with other elements in the first bitmap or 2) a corresponding cell is in conflict with one or more other cells in the first bitmap and is a last cell in a sequential order of the first bitmap that conflicts with the one or more other cells, wherein a position of each cell in the second bitmap maps to a same position of the corresponding cell in the first bitmap. The processor can store the second bitmap as a mask for a scatter operation to avoid lane conflicts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.