Semiconductor device
US10692781B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2018 |
| Grant date | Jun 23, 2020 |
| Priority date | — |
| Expiry date | Mar 22, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
Abstract
A semiconductor device including a first fin pattern and a second fin pattern, which are in parallel in a lengthwise direction; a first trench between the first fin pattern and the second fin pattern; a field insulating film partially filling the first trench, an upper surface of the field insulating film being lower than an upper surface of the first fin pattern and an upper surface of the second fin pattern; a spacer spaced apart from the first fin pattern and the second fin pattern, the spacer being on the field insulating film and defining a second trench, the second trench including an upper portion and an lower portion; an insulating line pattern on a sidewall of the lower portion of the second trench; and a conductive pattern filling an upper portion of the second trench and being on the insulating line pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.