Method and device for electrical overstress and electrostatic discharge protection
US10692854B2 · kind B2 · utility
1Cited by
21References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2018 |
| Grant date | Jun 23, 2020 |
| Priority date | — |
| Expiry date | Mar 19, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/611
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is protected from electrical overstress (EOS) and electro-static discharge (ESD) events by a series protection circuit electrically coupled in series along the transmission line between a signal source and a load. The series protection circuit includes a first field-effect transistor (FET) electrically coupled in series between the signal source and load. A parallel protection circuit is electrically coupled between the transmission line and a ground node. The parallel protection circuit can include a transient-voltage-suppression (TVS) diode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.