Method and apparatus for generating clock
US10693472B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2019 |
| Grant date | Jun 23, 2020 |
| Priority date | — |
| Expiry date | Feb 22, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock generation apparatus includes a pulse generator configured to generate a pulse signal and a selection signal using a reference clock signal, a delay line circuit, a switch and a controller. The delay line circuit selects, as an input signal to a delay path, the pulse signal or a fed back portion of a delay clock signal at an output of the delay path, where the selection is based on the selection signal; and thereby generates the delay clock signal. The switch switches a first voltage or a second voltage to the delay line circuit for its operation, where the first voltage further provides power to the pulse generator. The second voltage is generated based on a phase difference between the reference clock signal and the delay clock signal. The controller generates a switch control signal based on a frequency of the delay clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.