Updating cache using two bloom filters
US10698812B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2019 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Aug 26, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/225
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Updating cache devices includes a processor to detect a first set of hash functions and a first bit array corresponding to elements of a cache. In some examples, the processor detects a first instruction to add a new element to the cache and modify the first bit array based on the new element. Additionally, the processor processes a first invalidation operation and generates a second bit array and a second set of hash functions, while processing additional instructions. The processor deletes the first bit array and the first set of hash functions in response to detecting that the second bit array and the second set of hash functions have each been generated. Some examples process a second invalidation operation with the second set of hash functions and the second bit array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.