Virtualization of a reconfigurable data processor
US10698853B1 · kind B1 · utility
38Cited by
19References
22Claims
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Key dates
| Filing date | Jan 3, 2019 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Jan 3, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reconfigurable data processor comprises an array of configurable units and a bus system configurable to define virtual machines. The system can partition the array of configurable units into a plurality of sets of configurable units, and block communications via the bus system between configurable units within a particular set and configurable units outside the particular set. A memory access controller can be connected to the bus system, configurable to confine access to memory outside the array of configurable units originating from within the particular set to memory space allocated to the particular.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.