Methods for fabricating semiconductor devices that have polycrystalline CVD diamond
US10699896B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Apr 14, 2019 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Apr 14, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device structure includes: providing a substrate comprising a layer of compound semiconductor material; forming a seed layer of nano-crystalline diamond having a layer thickness in a range 5 to 50 nm on the layer of compound semiconductor material; and growing a layer of polycrystalline CVD diamond on the seed layer using a chemical vapour deposition (CVD) technique. An effective thermal boundary resistance (TBReff) at an interface between the layer of compound semiconductor material and the layer of polycrystalline CVD diamond material is no more than 50 m2K/GW.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.