Cooled electronics package with stacked power electronics components
US10699986B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2018 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Dec 27, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10166
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electronics package includes an electrically conducting support layer; at least one electrically conducting outer layer; at least two power electronics components arranged on different sides of the support layer and electrically interconnected with the support layer and with the at least one outer layer; and isolation material, in which the support layer and the at least two power electronics components are embedded, the support layer and the at least one outer layer are laminated together with the isolation material; and a cooling channel for conducting a cooling fluid through the electronics package, the cooling channel runs between the at least two power electronics components through the support layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.