Fan-out semiconductor package
US10700024B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2018 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Apr 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01Q1/40
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fan-out semiconductor package includes: a core member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the core member and the semiconductor chip; and a connection member disposed on the core member and an active surface of the semiconductor chip and including a redistribution layer connected to the connection pads. The core member includes a plurality of wiring layers disposed on different levels, a dielectric is disposed between the plurality of wiring layers of the core member, one of the plurality of wiring layers includes an antenna pattern, the other of the plurality of wiring layers includes a ground pattern, and the antenna pattern is connected to the connection pads through the redistribution layer in a signal manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.