Array substrate, manufacturing method thereof and display panel
US10700096B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 8, 2018 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Nov 8, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An array substrate, a manufacturing method thereof and a display panel are provided. The array substrate includes a base substrate and a wiring layer. The base substrate includes a peripheral region, a bending region and a driving circuit region. The bending region is arranged between the driving circuit region and the peripheral region. A portion of the base substrate at the bending region is a stress buffer member arranged at an end of the bending region adjacent to the peripheral region, connected to a portion of the base substrate at the peripheral region, and spaced apart from a portion of the base substrate at the driving circuit region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.