Low-temperature polysilicon thin film transistor, method of manufacturing the same, and display substrate
US10700107B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2017 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Oct 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02686
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
It is provided a low-temperature polysilicon thin film transistor formed on a substrate, including: a gate electrode on the substrate; an active layer on the gate electrode, the active layer including a channel region, the channel region having a polysilicon region and amorphous silicon regions respectively on both sides of the polysilicon region; and an etch stop layer on the active layer. An orthogonal projection of the polysilicon region on the substrate is located within an orthogonal projection of the gate electrode on the substrate, and an area of the orthogonal projection the polysilicon region on the substrate is smaller than an area of the orthogonal projection of the gate electrode on the substrate. The orthogonal projection of the polysilicon region on the substrate is located within an orthogonal projection of the etch stop layer on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.