Semiconductor device
US10700184B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 4, 2018 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Sep 4, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/117
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor device a first electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, a sixth semiconductor region, a seventh semiconductor region, an eighth semiconductor region, a gate electrode, a ninth semiconductor region, and a second electrode. The first, second, and fourth semiconductor regions are provided on the first electrode. The third semiconductor region is provided between the first and second semiconductor regions. The fifth semiconductor region is provided on the first, second, third, and fourth semiconductor regions. The sixth and seventh semiconductor regions are provided on the fifth semiconductor region. The eighth semiconductor region is provided on a portion of the seventh semiconductor region. The ninth semiconductor region is provided around the sixth semiconductor region and the seventh semiconductor region. The ninth semiconductor region is positioned on the second semiconductor region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.