Harmonic-based nonlinearity factorization scheme to facilitate up-conversion mixer linearity
US10700640B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2019 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Jun 5, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/0491
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The disclosed embodiments relate to the design of a system that implements an up-conversion mixer. This system includes a regulator-based linearized transconductance (gm) stage, which converts a differential intermediate frequency (IF) voltage signal into a corresponding pair of IF currents. It also includes a pair of current mirrors, which duplicates the pair of IF currents into sources of a set of switching transistors. The set of switching transistors uses a differential local oscillator (LO) signal to gate the duplicated pair of IF currents to produce a differential radio frequency (RF) output signal. Finally, a combination of capacitors and/or inductors is coupled to common source nodes of the set of switching transistors to suppress higher order harmonics in an associated common source node voltage signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.