System and method for error correction in data communications
US10700713B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2018 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Sep 18, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/2909
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and system are provided for error correction. After row encoding and column encoding, additional codeword data (ACD) and modified parity (P′) may be concurrently created, for each of a plurality of modified column codewords (CCW′), by multiplying initial calculated parity P by a generator matrix G. Each CCW′ may include an ACD portion and a P′ portion such that each bit in the P′ portion of a selected CCW′ is present in the ACD portion for one of the other CCW′. In contrast to known approaches, the method and system may provide modified column codewords such that all data and parity bits are present in two codewords while using only two types of codewords, and without using extra parity-on-parity bits. In a set of modified column codewords, each bit in the modified parity in one modified codeword is present in another codeword.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.