Full-frame image sensor system
US10701297B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 22, 2017 |
| Grant date | Jun 30, 2020 |
| Priority date | — |
| Expiry date | Nov 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A full-frame image sensor system comprises at least a pair of readout circuits, at least a pair of channel selection circuits, and at least a pair of interface circuits arranged symmetrically with respect to a pixel array; the readout circuits are electrically connected to two sides of the pixel array respectively; the channel selection circuit and the readout circuit on a same side of the pixel array are electrically connected to each other. The interface circuit and the channel selection circuit on a same side of the pixel array are electrically connected to each other. As a result, the circuits on the two sides of the pixel array are substantially symmetrical, the center of the pixel array coincides with the center of the entire chip. It not only brings convenience to the subsequent packaging and application, but also reduces the size of circuit such as the PGA and the ADC on one side of the pixel array, and overcomes the problem that the capacity of circuit such as the PGA and the ADC cannot be increased when the height of the circuits such as the PGA and the ADC cannot exceed the height of the pixel array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.